Lead Engineer, CPLD/FPGA Engineer (HW Design) at Celestica Gbs Malaysia Sdn. Bhd. - Job Segment: Logistics
Role Summary
The Lead Engineer will oversee CPLD/FPGA hardware design projects, ensuring high-quality standards and effective team collaboration. This role is pivotal in driving engineering excellence within Celestica.
Job Description
Celestica Gbs Malaysia Sdn. Bhd. is seeking a Lead Engineer specializing in CPLD/FPGA hardware design. The ideal candidate will be responsible for leading engineering projects, focusing on the design and implementation of complex electronic systems. This role requires collaboration with cross-functional teams to ensure successful project delivery and adherence to industry standards.
As a Lead Engineer, you will leverage your expertise in electronics engineering to drive innovation and efficiency in product development. You will also mentor junior engineers and contribute to the continuous improvement of engineering processes within the organization.
Job Requirements
Bachelor's degree in Electronics Engineering or related field
Proven experience in CPLD/FPGA design and development
Strong understanding of hardware design principles
Excellent problem-solving skills and attention to detail
Ability to work collaboratively in a team environment
Strong communication skills, both verbal and written
Lead Engineer, CPLD/FPGA Engineer (HW Design) - Frequently Asked Questions
What is the salary for a Lead Engineer, CPLD/FPGA Engineer (HW Design) at Celestica Gbs Malaysia Sdn. Bhd. in Job Segment: Logistics?
Celestica Gbs Malaysia Sdn. Bhd. has not disclosed the salary for this role. Lead Engineer, CPLD/FPGA Engineer (HW Design) positions in Job Segment: Logistics typically pay RM1,700–RM7,500 per month, based on the 130 comparable vacancies currently listed on SuperJobs.
Where is this Lead Engineer, CPLD/FPGA Engineer (HW Design) job located?
This Lead Engineer, CPLD/FPGA Engineer (HW Design) position is based in Job Segment: Logistics, Malaysia. This role is fully on-site.
What qualifications do I need for this Lead Engineer, CPLD/FPGA Engineer (HW Design) role?
Celestica Gbs Malaysia Sdn. Bhd. is looking for Bachelor's degree in Electronics Engineering or related field; Proven experience in CPLD/FPGA design and development; Strong understanding of hardware design principles.
How do I apply for this Lead Engineer, CPLD/FPGA Engineer (HW Design) job at Celestica Gbs Malaysia Sdn. Bhd.?
Apply directly on SuperJobs — create a free profile, upload your CV once and submit. There is no agency fee and no charge to applicants. Applications close 2026-11-29.
Quick Info
Company
Celestica Gbs Malaysia Sdn. Bhd.
Location
Job Segment: Logistics, Application Engineering, Electronics Engineer, Aerospace Engineering, Manufacturing Engineer, Operations, Engineering
Salary
Undisclosed
Skills Required
7 skills
Click to submit your application
Required Skills
Lead Engineer, CPLD/FPGA Engineer (HW Design) Salary at Celestica Gbs Malaysia Sdn. Bhd.
Celestica Gbs Malaysia Sdn. Bhd. has not disclosed the salary for this role. Lead Engineer, CPLD/FPGA Engineer (HW Design) positions in Job Segment: Logistics typically pay RM1,700–RM7,500 per month, based on the 130 comparable vacancies currently listed on SuperJobs.
How to Apply for This Lead Engineer, CPLD/FPGA Engineer (HW Design) Role
- Click Apply Now and sign in, or create a free SuperJobs profile. It takes about two minutes and there is no agency fee.
- Upload your CV once and answer any screening questions Celestica Gbs Malaysia Sdn. Bhd. asks. Your profile is reused for every application after this one.
- Submit, then track the application and any employer replies from your dashboard. Applications close 2026-11-29, so apply early.
Application Tips
- Ensure your resume highlights relevant skills and experience
- Tailor your application to match the role requirements
- Double-check all information before submitting
- Submit your application as soon as possible to increase your chances
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