
This position is ideal for professionals with a strong background in VLSI design, looking to take ownership of the physical design process in a dynamic environment. The role offers opportunities to work with advanced technology nodes and cutting-edge EDA tools.
The Associate III - VLSI role involves managing the complete physical design flow from RTL to GDSII delivery. Key responsibilities include floorplanning, placement and routing, clock tree synthesis, and physical verification to ensure compliance with design rules. The role also requires performing timing closure and optimization, as well as power and reliability analysis to enhance design performance.
Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering
2-5+ years of experience in physical design at advanced nodes (e.g., 7nm, 5nm, 3nm)
Expert proficiency in Synopsys or Cadence tools
Strong proficiency in TCL, Python, or Perl for automation
Deep understanding of VLSI design principles and low-power design techniques
UST has not disclosed the salary for this role.
This Associate III - VLSI position is based in Penang, Malaysia. This role is fully on-site.
UST is looking for Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering; 2-5+ years of experience in physical design at advanced nodes (e.g., 7nm, 5nm, 3nm); Expert proficiency in Synopsys or Cadence tools.
Apply directly on SuperJobs — create a free profile, upload your CV once and submit. There is no agency fee and no charge to applicants. Applications close 2026-11-07.
Company
UST
Location
Penang
Salary
Undisclosed
Skills Required
4 skills
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UST has not disclosed the salary for this role.
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