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Senior Hardware Design Engineer (FPGA/CPLD) at Celestica Gbs Malaysia Sdn. Bhd. - Undisclosed

Celestica Gbs Malaysia Sdn. Bhd.
Undisclosed
Salary: Undisclosed

Role Summary

The Senior Hardware Design Engineer will play a crucial role in developing cutting-edge hardware solutions. This position requires a strong background in FPGA/CPLD design and a commitment to delivering high-quality results.

Job Description

As a Senior Hardware Design Engineer focusing on FPGA/CPLD, you will be responsible for the design, development, and testing of hardware solutions. Your role will involve collaborating with cross-functional teams to ensure the successful implementation of projects in a fast-paced environment. You will leverage your expertise in hardware design to contribute to innovative technology solutions that meet client needs.

Job Requirements

Bachelor's degree in Electrical Engineering or related field

Proficiency in FPGA/CPLD design and development

Experience with hardware testing and validation

Strong problem-solving skills and attention to detail

Ability to work collaboratively in a team environment

Senior Hardware Design Engineer (FPGA/CPLD) - Frequently Asked Questions

What is the salary for a Senior Hardware Design Engineer (FPGA/CPLD) at Celestica Gbs Malaysia Sdn. Bhd. in Undisclosed?

Celestica Gbs Malaysia Sdn. Bhd. has not disclosed the salary for this role. Senior Hardware Design Engineer (FPGA/CPLD) positions in Undisclosed typically pay RM800–RM10,000 per month, based on the 171 comparable vacancies currently listed on SuperJobs.

Where is this Senior Hardware Design Engineer (FPGA/CPLD) job located?

This Senior Hardware Design Engineer (FPGA/CPLD) position is based in Undisclosed, Malaysia. This role is fully on-site.

What qualifications do I need for this Senior Hardware Design Engineer (FPGA/CPLD) role?

Celestica Gbs Malaysia Sdn. Bhd. is looking for Bachelor's degree in Electrical Engineering or related field; Proficiency in FPGA/CPLD design and development; Experience with hardware testing and validation.

How do I apply for this Senior Hardware Design Engineer (FPGA/CPLD) job at Celestica Gbs Malaysia Sdn. Bhd.?

Apply directly on SuperJobs — create a free profile, upload your CV once and submit. There is no agency fee and no charge to applicants. Applications close 2026-11-08.

Quick Info

Company

Celestica Gbs Malaysia Sdn. Bhd.

Location

Undisclosed

Salary

Undisclosed

Skills Required

6 skills

Click to submit your application

Required Skills

FPGACPLDHardware DesignTestingProblem-SolvingTeamwork

Senior Hardware Design Engineer (FPGA/CPLD) Salary at Celestica Gbs Malaysia Sdn. Bhd.

Celestica Gbs Malaysia Sdn. Bhd. has not disclosed the salary for this role. Senior Hardware Design Engineer (FPGA/CPLD) positions in Undisclosed typically pay RM800–RM10,000 per month, based on the 171 comparable vacancies currently listed on SuperJobs.

How to Apply for This Senior Hardware Design Engineer (FPGA/CPLD) Role

  1. Click Apply Now and sign in, or create a free SuperJobs profile. It takes about two minutes and there is no agency fee.
  2. Upload your CV once and answer any screening questions Celestica Gbs Malaysia Sdn. Bhd. asks. Your profile is reused for every application after this one.
  3. Submit, then track the application and any employer replies from your dashboard. Applications close 2026-11-08, so apply early.

Application Tips

  • Ensure your resume highlights relevant skills and experience
  • Tailor your application to match the role requirements
  • Double-check all information before submitting
  • Submit your application as soon as possible to increase your chances

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